Anonymous Anonymous - 25 days ago
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C

ADCwithDMA

//Как сделал я
//==========================DMA===============================
    DMA2_Stream4->CR &=  ~DMA_SxCR_EN;     //DMA2 OFF
    DMA2_Stream4->CR &=  ~DMA_SxCR_CHSEL; //Select channel0  
    DMA2_Stream4->PAR =  (uint32_t)&(ADC1->DR);      //Adress of Peripheral
    DMA2_Stream4->M0AR=  (uint32_t)adcBuf;          //Adress of Memory
    DMA2_Stream4->CR &=  ~DMA_SxCR_DIR; //Direction From Perih TO Memory
    DMA2_Stream4->CR |=  DMA_SxCR_MINC;  // Memory increment ON
    DMA2_Stream4->CR &=  ~DMA_SxCR_PINC; // Perih increment OFF
    DMA2_Stream4->CR &=  ~DMA_SxCR_CIRC; // Circulate mode off, Normal mode on
    DMA2_Stream4->CR |=  DMA_SxCR_MSIZE_0;  //Memory data size = 16 bit
    DMA2_Stream4->CR |=  DMA_SxCR_PSIZE_0; //Perih data size = 16 bit
    DMA2_Stream4->CR |=  DMA_SxCR_PL_0|DMA_SxCR_PL_1; //Priority Higth
    DMA2_Stream4->NDTR = NSAMPLES;    //Transaction count
    DMA2_Stream4->CR |=  DMA_SxCR_TCIE;	// Transfer complete interrupt
    DMA2_Stream4->CR |=  DMA_SxCR_EN;   //DMA2 ON
//======================================================

//================ADC==================================
ADC1->CR2 &= ~ADC_CR2_ADON; //ADC1 OFF
ADC2->CR2 &= ~ADC_CR2_ADON; //ADC1 OFF

   //ADC Configure
   ADC->CCR |= ADC_CCR_MULTI_2|ADC_CCR_MULTI_1; //Mode: RegSimult
	 
	 ADC1->CR1 |= ADC_CR1_SCAN;  //ADC1 ScanConvMode ENABLE
	 ADC1->CR2 |= ADC_CR2_CONT;  //ADC1 ContinuousConvMode ENABLE
         ADC1->SMPR1 |= ADC_SMPR1_SMP10_0; //ADC1 Configure CHANNEL 10 at 15 Cycles
	 ADC1->CR2 |= ADC_CR2_DMA;  //ADC1 DMA ENABLE
	 
	 ADC2->CR1 |= ADC_CR1_SCAN;  //ADC2 ScanConvMode ENABLE
	 ADC2->CR2 |= ADC_CR2_CONT;  //ADC2 ContinuousConvMode ENABLE
         ADC2->SMPR1 |= ADC_SMPR1_SMP11_0; //ADC2 Configure CHANNEL 11 at 15 Cycles
	 ADC2->CR2 |= ADC_CR2_EXTEN_0;  //ADC2 ExternalSelect

	 Sleep(10);
	 ADC1->CR2 |= ADC_CR2_ADON; //ADC1 ON
	 ADC2->CR2 |= ADC_CR2_ADON; //ADC2 ON
//=====================================================

//=============ADC_Read================================
 ConfigDMA();
ADC1->CR2 |= ADC_CR2_SWSTART|ADC_CR2_EXTEN_0;
while(!(DMA2->HISR & DMA_HISR_TCIF4)){};
	DMA2->HIFCR = DMA_HIFCR_CTCIF4;  
ADC1->CR2 &= ~ADC_CR2_SWSTART|ADC_CR2_EXTEN_0;
//=======================================================
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