What is the relationship between Makefile and Bash?
Example in Makefile you have:
CC = gcc
~# CC = gcc
-bash: CC: command not found
$(CC) $(LDFLAGS) -o $@ $(OBJS) $(LIBS)
There's no relationship -
bash are two separate programs that parse distinct syntaxes. That they have similar or overlapping syntactic elements is likely due to having been developed around the same time and for some similar purposes, but they don't rely on the same parser or grammar.
Many distinct languages have shared language features either for ease of adoption or from imitation. Most languages use
+ to mean addition, for example, but that doesn't make the languages related.